A Message from the Director, Prof. Jian-Ping Wang

We reviewed the exciting outcomes of Theme 1 and Theme 2 in pervious newsletters, so Themes 4 and 5 are highlighted this quarter. Thank you to Steve Koester, Kaushik Roy, and Sachin Sapatnekar for their good Theme leadership.

As I was reading these brief histories of each Theme, I noticed that many “unexpected” breakthroughs arose from C-SPIN’s cross-disciplinary, multi-institutional vision, proving again that C-SPIN’s whole really is greater than the sum of its parts. Further proof of this is the recent review on the promising aspects of spin-based systems through C-SPIN’s vertical integration presented at DAC 2017. C-SPIN has truly been a one-of-a-kind research center in the computing electronics research and industry community – we should all be proud of our work together.

I’m also convinced that C-SPIN’s efforts have re-positioned U.S. academia back to a leading position on spintronic research for computing and memory. This could not have happened without the generous support of our STARnet sponsors and the great vision of engineering leaders from the US semiconductor industry. The unique connections that PIs, post-docs, and graduate students have made with our sponsors will benefit all parties.

Finally, I am highly pleased that much of the original C-SPIN research continues to stimulate a lot of new research around the world.

New Sputtering System Just in Time

A new tool to rapidly advance spintronic research

Industry’s loss has turned into C-SPIN’s gain. A virtually unused multi-chamber sputtering deposition system (MC-SD) is now in the University of Minnesota’s Nanocenter, nearly ready for industry and academic research.

The MC-SD machine was originally bought by Hitachi Global Storage Technologies (HGST) for approximately $4M from Oerlikon Leybold Vacuum (OLV). Before HGST could use the MC-SD for advanced materials research, however, the company was bought by Western Digital in 2012 – just before Jian-Ping Wang submitted the original white paper for C-SPIN. Western Digital phased out the HGST research arm that used the sputtering system, so the system sat unused until this year. Read More.

Looking Back, Looking Ahead: Theme 4

Not long after C-SPIN was named a SRC STARnet center, the original Theme 4 members had to be changed. Even with a semi-scramble by C-SPIN Director Jian-Ping Wang and new Theme 4 leader Steve Koester, most of the Theme’s research started 2-3 months after the Center officially opened in January 2013. On the plus side of that scramble, however, was the addition of PIs Geoffrey Beach (MIT) and Maxim Tsoi (Univ. Texas Austin) to the Theme 4 team.

Even after the addition of Beach and Tsoi, the Theme 4 goals didn’t change from the original proposal to STARnet: Develop new device concepts based upon new spintronic material properties. These materials included antiferromagnets, ferromagnets with perpendicular anisotropy, and materials with strong-spin orbit coupling. Read More.

Looking Back, Looking Ahead: Theme 5

In 2012, spintronics was seen as one of several technologies that could potentially provide new computational platforms for the post-CMOS era. The problem: MTJ-based memories and logic, all-spin logic (ASL) circuits for digital logic, and early preliminary structures for neuromorphic information processing had been proposed, but simulations showed that they either consumed high levels of power or processed information slowly.

Still, those theoretical conclusions were just that – theoretical. The sheer newness of spintronics as a major field of study meant that nobody really knew what nanomagnets could do for the computing industry. In fact, there were no robust spintronics-CMOS comparisons for spin injection efficiency, spin transfer, and numerous energy measures. So it was certainly possible that new spintronic architectures could spark a flurry of post-CMOS – or maybe even CMOS-enhancing – developments.

Theme 5 was included in the original C-SPIN proposal to address such issues. As the proposal stated, Theme 5 would be “the first ever integrated effort led by university designers to bring spin technology closer to practical reality with the direct support and guidance by semiconductor industry.” Read More.

Post-Doc and Student Profiles

Maghna Mankalale, Ph.D. Candidate, University of Minnesota

I am currently working on I am currently working on developing novel low-power and high-speed spin-based logic devices, a project under Theme 5. The objective of this work is to use physics-based models to design and develop devices that can replace or complement existing CMOS transistors. In my first project, I worked on designing optimized all spin logic (ASL)-based standard logic gates like (N)AND, (N)OR, XOR, and inverter. I devised optimization techniques that considered the impact of layout factors during the design process. My techniques led to ASL gates that are up to 24% faster and up to 47% more energy efficient than previous versions. I also devised STEM, a novel two phase evaluation technique for ASL majority logic gates that provides up to 3.4x speed improvement and up to 6.9x improvement in energy dissipation over previous un-optimized ASL circuits. Read More.

Tobias Brown-Heft, Ph.D. Candidate, University California Santa Barbara

I am currently working on MBE growth and characterization of atomic superlattices formed by pairs of Heusler materials for Theme 1. The project is based on some great theoretical work done a few years ago by Prof. Bill Butler’s group. They predicted that Heusler superlattices could produce a half-metal with perpendicular magnetic anisotropy and so would be an ideal contact for magnetoresistive memory devices. So far, the results are promising.

I have also been working on chemical and electrical analyses to determine how annealing affects Co2MnSi-based magnetic tunnel junction interfaces – another application of magnetic Heusler materials for spintronics. Read More.

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